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| IPD50N06S3L-06 OptiMOS(R)-T Power-Transistor Product Summary V DS R DS(on),max ID 55 6.0 50 V m A Features * N-channel - Logic Level - Enhancement mode * Automotive AEC Q101 qualified * MSL1 up to 260C peak reflow * 175C operating temperature * Green package (RoHS compliant) * Ultra low Rds(on) * 100% Avalanche tested PG-TO252-3-11 Type IPD50N06S3L-06 Package PG-TO252-3-11 Marking 3N06L06 Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current1) Symbol ID Conditions T C=25 C, V GS=10 V T C=100 C, V GS=10 V2) Pulsed drain current2) Avalanche energy, single pulse2) Avalanche current, single pulse Gate source voltage3) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS I AS V GS P tot T j, T stg T C=25 C T C=25 C I D=25 A Value 50 50 200 710 50 16 136 -55 ... +175 55/175/56 mJ A V W C Unit A Rev. 1.2 page 1 2009-05-20 IPD50N06S3L-06 Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics2) Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area4) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D= 1 mA V GS(th) I DSS V DS=V GS, I D=80 A V DS=55 V, V GS=0 V, T j=25 C V DS=55 V, V GS=0 V, T j=125 C2) Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=16 V, V DS=0 V V GS=5 V, I D=37 A V GS=10 V, I D=50 A 55 1.2 1.7 0.01 2.2 1 A V 1.1 62 40 K/W - 1 1 8.4 5.1 100 100 11 6 nA m Rev. 1.2 page 2 2009-05-20 IPD50N06S3L-06 Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage Reverse recovery time2) Reverse recovery charge2) 1) C iss C oss Crss t d(on) tr t d(off) tf V DD=27.5 V, V GS=10 V, I D=50 A, R G=7 V GS=0 V, V DS=25 V, f =1 MHz - 9400 1200 1130 20 57 75 115 11750 pF 1800 1700 ns Q gs Q gd Qg V plateau V DD=11 V, I D=50 A, V GS=0 to 10 V - 37 27 129 3.9 50 40 145 - nC V IS I S,pulse V SD t rr Q rr T C=25 C V GS=0 V, I F=50 A, T j=25 C V R=27.5 V, I F=I S, di F/dt =100 A/s 0.6 - 0.9 47 62 50 200 1.3 - A V ns nC Current is limited by bondwire; with an R thJC = 1.1 K/W the chip is able to carry 112 A at 25C. For detailed information see Application Note ANPS071E. 2) Defined by design. Not subject to production test. 3) Qualified at -5V and +20V. 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.2 page 3 2009-05-20 IPD50N06S3L-06 1 Power dissipation P tot = f(T C); V GS 4 V 2 Drain current I D = f(T C); V GS 4 V 160 140 120 60 40 100 P tot [W] 80 60 I D [A] 20 0 0 50 100 150 200 0 50 100 150 200 40 20 0 T C [C] T C [C] 3 Safe operating area I D = f(V DS); T C = 25 C; D = 0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T 101 1 s 10 s 100 0.5 100 1 ms 100 s Z thJC [K/W] I D [A] 0.1 10-1 0.05 10 10 -2 0.01 1 0.1 1 10 100 10-3 10-7 single pulse 10-6 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.2 page 4 2009-05-20 IPD50N06S3L-06 5 Typ. output characteristics I D = f(V DS); T j = 25 C parameter: V GS 200 10 V 6V 6 Typ. drain-source on-state resistance R DS(on) = f(I D); T j = 25 C parameter: V GS 10 5V 6V 175 150 8 125 5V 100 4.5 V R DS(on) [m] I D [A] 8V 75 50 25 0 0 2 4 6 8 10 4V 6 9V 10 V 3.5 V 4 0 50 100 150 200 V DS [V] I D [A] 7 Typ. transfer characteristics I D = f(V GS); V DS = 4 V parameter: T j 150 -55 C 25 C 175 C 8 Typ. drain-source on-state resistance R DS(on) = f(T j); I D = 50 A; V GS = 10 V 10 8 100 R DS(on) [m] 50 0 0 2 4 6 I D [A] 6 4 2 -60 -20 20 60 100 140 180 V GS [V] T j [C] Rev. 1.2 page 5 2009-05-20 IPD50N06S3L-06 9 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D 2.5 2.25 2 1.75 800A 10 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz Ciss Coss 104 V GS(th) [V] 1.5 1.25 1 0.75 0.5 -60 -20 20 80A Crss C [pF] 103 102 60 100 140 180 0 5 10 15 20 25 T j [C] V DS [V] 11 Typical forward diode characteristicis IF = f(VSD) parameter: T j 103 12 Typ. avalanche characteristics I AV = f(t AV) parameter: T j(start) 100 25C 100C 150C 102 I AV [A] 101 175 C 25 C I F [A] 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1 1 10 100 1000 V SD [V] t AV [s] Rev. 1.2 page 6 2009-05-20 IPD50N06S3L-06 13 Typical avalanche Energy E AS = f(T j) parameter: I D 1500 12.5 A 14 Drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA 65 1200 60 V BR(DSS) [V] 900 E AS [mJ] 25 A 55 600 50 A 50 300 0 0 50 100 150 200 45 -60 -20 20 60 100 140 180 T j [C] T j [C] 15 Typ. gate charge V GS = f(Q gate); I D = 50 A pulsed parameter: V DD 12 16 Gate charge waveforms V GS 11 V 44 V 10 Qg 8 V plateau V GS [V] 6 V g s(th) 4 2 Q g (th) Q gs 0 50 100 150 200 Q sw Q gd Q gate 0 Q gate [nC] Rev. 1.2 page 7 2009-05-20 IPD50N06S3L-06 Published by Infineon Technologies AG 81726 Munich, Germany (c) Infineon Technologies AG 2009 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.2 page 8 2009-05-20 IPD50N06S3L-06 Revision History Version Date Changes Implementation of avalanche 07.11.2007 current single pulse Data Sheet version 1.1 Data Sheet version 1.1 07.11.2007 Update of package drawing Update of avalanche diagram 12 07.11.2007 and 13 implementation of footnote 2 for 07.11.2007 Eas specification Correction of marking and update 15.06.2009 of disclaimer Data Sheet version 1.1 Data Sheet version 1.1 Data Sheet version 1.2 Data Sheet version 1.2 15.06.2009 Correction of package name Rev. 1.2 page 9 2009-05-20 |
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